May 2026 Summaries

Since mid-2025, domain-specific languages (DSLs) focusing on tiling have gained traction in machine learning workflows, particularly with the release of the Blackwell architecture that emphasizes tile-based GPU programming. Tiling involves dividing tasks into smaller chunks that align better with GPU memory hierarchies, enhancing efficiency by enabling shared data usage across threads. The CuTeDSL is a prominent DSL supporting tiling, allowing kernel scheduling within Python without leaving the environment. This paradigm shift was demonstrated through the optimization of the Root Mean Square Normalization (RMSNorm) kernel on a GB10 GPU, showcasing significant performance improvements over naive implementations. Using CuTeDSL, developers transitioned from single-threaded to multi-threaded approaches, achieving greater GPU occupancy and throughput. The shift to one CTA per row reduced kernel duration by 56 times, though it initially struggled with wide rows like 64x32768. Iterative refinements introduced chunk-wide rows, optimizing parallelism and further enhancing performance, especially for wide-row cases. This iterative process highlighted the advantages of chunking, where more CTAs were created with minimal overhead, resulting in significant speedups compared to PyTorch's torch.compile, especially for large hidden sizes.